Noise in Semiconductor Devices: Modeling and Simulation

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Language: English

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Slideshare uses cookies to improve functionality and performance, and to provide you with relevant advertising. Vacuum based computers were rare and expensive. Khan, Statically adaptive multi FIFO buffer architecture for network on chip, Microprocessors & Microsystems, v.39 n.1, p.11-26, February 2015 Thomas Popp, Stefan Mangard, Masked dual-rail pre-charge logic: DPA-resistance without routing constraints, Proceedings of the 7th international conference on Cryptographic hardware and embedded systems, August 29-September 01, 2005, Edinburgh, UK Sung Kyu Lim, Mike Niemier, Partitioning and placement for buildable QCA circuits, Nano, quantum and molecular computing: implications to high level design and validation, Kluwer Academic Publishers, Norwell, MA, 2004 Todd Austin, Valeria Bertacco, David Blaauw, Trevor Mudge, Opportunities and challenges for better than worst-case design, Proceedings of the 2005 Asia and South Pacific Design Automation Conference, January 18-21, 2005, Shanghai, China Qiang Gao, Yin Shen, Yici Cai, Hailong Yao, Analog circuit shielding routing algorithm based on net classification, Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design, August 18-20, 2010, Austin, Texas, USA Hua Wang, Francky Catthoor, Miguel Miranda, Wim Dehaene, Synthesis of Runtime Switchable Pareto Buffers Offering Full Range Fine Grained Energy/Delay Trade-Offs, Journal of Signal Processing Systems, v.52 n.2, p.193-210, August 2008 Baris Taskin, Andy Chiu, Jonathan Salkind, Daniel Venutolo, A shift-register-based QCA memory architecture, ACM Journal on Emerging Technologies in Computing Systems (JETC), v.5 n.1, p.1-18, January 2009 S.

Pages: 213

Publisher: Springer; 2001 edition (September 6, 2001)

ISBN: 3540665838

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